The Atum A5 Development Kit is Terasic’s first dev kit in the Intel^® Agilex™ 5 FPGA portfolio. Powered by the largest Agilex^® 5 SoC FPGA with 656K LEs, the Atum A5 Development Kit is an out-of-the-box platform for advanced AI and vision application development.

With a rich set of interfaces ranging from 2.5G Ethernet, high-speed DDR4, QSFP+, PCIe Gen 3x4 and FMC+ connectors to MIPI connector and HDMI, the Atum A5 excels in a wide range of applications, including industrial networking, AI, embedded vision, medical and healthcare, video applications, and various other I/O expansion and high-speed applications!

Key Benefits:

Intel^® Agilex™ 5 E-Series with 656K LE and consisting of HPS with 2xA55 and 2xA76. Core Speed Grade: -4S.
Two On-board 2GB DDR4 banks with 32-bit data bus (no ECC). One shared with HPS.
HPC FMC+ (12 transceivers), 2x20 GPIO and 2x6 TMD connector one each for expansion.
One 2.5G Ethernet (use 1 transceiver + 88E2110) for high speed transmission.
One HDMI OUT (ADV7513; Support 1080P) for video output.
Two 2-lane MIPI connectors for vision application.
PCIe cabling Gen 3x4 socket and One QSFP+ for high speed communication.
Support USB 3.1 Gen1, USB to UART, 8GB eMMC/MicroSD socket, 2x6 GPIO header and Gigabit interface for HPS communication.
Support Linux BSP for HPS development.

Atum A5 Board Layout:

Terasic's Atum A5 Development Kit available in May!

Please contact sales@terasic.com for more information!